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1. general description the hef4053b is a triple single-pole double-th row (spdt) analog switch, suitable for use as an analog or digital multip lexer/demultiplexer. each swit ch has a digital select input (sn), two independent inputs/outputs (ny0 and ny1) and a common input/output (nz). all three switches share an enable input (e ). a high on e causes all switches into the high-impedance off-state, independent of sn. v dd and v ss are the supply voltage connections for the digital control inputs (sn and e ). the v dd to v ss range is 3 v to 15 v. the analog inputs/outputs (ny0, ny1 and nz) can swing between v dd as a positive limit and v ee as a negative limit. v dd ? v ee may not exceed 15 v. unused inputs must be connected to v dd , v ss , or another input. for operation as a digital multiplexer/demultiplexer, v ee is connected to v ss (typically ground). v ee and v ss are the supply voltage connections for the switches. the hef4053b is suitable for use over both the industrial ( ? 40 c to +85 c) and automotive ( ? 40 c to +125 c) temperature ranges. 2. features and benefits ? fully static operation ? 5 v, 10 v, and 15 v parametric ratings ? standardized symmetrical output characteristics ? operates across the automotive temperature range ? 40 c to +125 c ? complies with jedec standard jesd 13-b 3. applications ? industrial and automotive ? analog multiplexing and demultiplexing ? digital multiplexing and demultiplexing ? signal gating hef4053b triple single-pole doubl e-throw analog switch rev. 09 ? 25 march 2010 product data sheet
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 2 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 4. ordering information 5. functional diagram table 1. ordering information all types operate from ? 40 c to +125 c. type number package name description version HEF4053BP dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 hef4053bt so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 hef4053btt tssop16 plastic thin shrink small out line package; 16 leads; body width 4.4 mm sot403-1 fig 1. logic symbol fig 2. functional diagram 001aae12 5 1y0 12 1y1 s1 13 11 s2 10 s3 9 6 e 2y0 2 2y1 1 3y0 5 3y1 3 3z 4 2z 15 1z 14 001aae124 logic level conversion 11 16 v dd 13 1y1 s1 logic level conversion decoder logic level conversion 12 1y0 14 1z 1 2y1 2 2y0 15 2z 3 3y1 5 3y0 43z 10 s2 9 87 v ee v ss s3 6 e
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 3 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch fig 3. logic diagram (one multiplexer/demultiplexer) 001aae64 5 ny1 nz ny0 level converter level converter to other multiplexers/demultiplexers sn e fig 4. schematic diagram (one switch) 001aae64 4 nyn nz v ee from decoder and enable logic v dd v dd
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 4 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level; x = don?t care. fig 5. pin configuration for sot38-4 (dip16) and sot109-1 (so16) fig 6. pin configuration for sot403-1 (tssop16) hef4053b 2y1 v dd 2y0 2z 3y1 1z 3z 1y1 3y0 1y0 es1 v ee s2 v ss s3 001aae643 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 hef4053b 2y1 v dd 2y0 2z 3y1 1z 3z 1y1 3y0 1y0 es1 v ee s2 v ss s3 001aaj899 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 2. pin description symbol pin description e 6 enable input (active low) v ee 7 supply voltage v ss 8 ground supply voltage s1, s2, s3 11, 10, 9 select input 1y0, 2y0, 3y0 12, 2, 5 independent input or output 1y1, 2y1, 3y1 13, 1, 3 independent input or output 1z, 2z, 3z 14, 15, 4 independent output or input v dd 16 supply voltage table 3. function table [1] inputs channel on e sn llny0 to nz l h ny1 to nz h x switches off
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 5 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 8. limiting values [1] to avoid drawing v dd current out of terminal z, when switch current flows in to terminals y, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current flows into terminal z, no v dd current will flow out of terminals y, and in this case there is no limit for the voltage drop across the switch, but the voltages at y and z may not exceed v dd or v ee . [2] for dip16 package: p tot derates linearly with 12 mw/k above 70 c. for so16 package: p tot derates linearly wi th 8 mw/k above 70 c. for tssop16 package: p tot derates linearly with 5.5 mw/k above 60 c. 9. recommended operating conditions table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to v ss = 0 v (ground). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +18 v v ee supply voltage referenced to v dd [1] ? 18 +0.5 v i ik input clamping current pins sn and e ; v i < ? 0.5 v or v i >v dd + 0.5 v - 10 ma v i input voltage ? 0.5 v dd + 0.5 v i i/o input/output current - 10 ma i dd supply current - 50 ma t stg storage temperature ? 65 +150 c t amb ambient temperature ? 40 +125 c p tot total power dissipation t amb = ? 40 c to +125 c [2] dip16 package - 750 mw so16 package - 500 mw tssop16 package - 500 mw p power dissipation per output - 100 mw table 5. recommended operating conditions symbol parameter conditions min typ max unit v dd supply voltage see figure 7 3- 15v v i input voltage 0 - v dd v t amb ambient temperature in free air ? 40 - +125 c t/ v input transition rise and fall rate v dd = 5 v - - 3.75 s/v v dd = 10 v - - 0.5 s/v v dd = 15 v - - 0.08 s/v
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 6 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 10. static characteristics fig 7. operating area as a function of the supply voltages v dd ? v ee (v) 015 510 001aae646 10 5 15 v dd ? v ss (v) 0 operating area table 6. static characteristics v ss = v ee = 0 v; v i = v ss or v dd unless otherwise specified. symbol parameter conditions v dd t amb = ? 40 c t amb = 25 c t amb = 85 c t amb = 125 c unit min max min max min max min max v ih high-level input voltage | i o | < 1 a 5 v 3.5 - 3.5 - 3.5 - 3.5 - v 10 v 7.0 - 7.0 - 7.0 - 7.0 - v 15 v 11.0 - 11.0 - 11.0 - 11.0 - v v il low-level input voltage | i o | < 1 a 5 v - 1.5 - 1.5 - 1.5 - 1.5 v 10 v - 3.0 - 3.0 - 3.0 - 3.0 v 15 v - 4.0 - 4.0 - 4.0 - 4.0 v i i input leakage current 15 v - 0.1 - 0.1 - 1.0 - 1.0 a i s(off) off-state leakage current z port; all channels off; see figure 8 15 v - - - 1000 - - - - na y port; per channel; see figure 9 15 v - - - 200 - - - - na i dd supply current i o = 0 a 5 v - 5 - 5 - 150 - 150 a 10 v - 10 - 10 - 300 - 300 a 15 v - 20 - 20 - 600 - 600 a c i input capacitance sn, e inputs - - - - 7.5 - - - - pf
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 7 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 10.1 test circuits 10.2 on resistance fig 8. test circuit for measuring off-state leakage current z port i s 001aaj90 0 v dd v i switch v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 1 2 v o fig 9. test circuit for measuring off-state leakage current nyn port i s 001aaj901 v ss v o switch v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 1 2 v i table 7. on resistance t amb = 25 c; i sw =200 a; v ss = v ee = 0 v. symbol parameter conditions v dd ? v ee typ max unit r on(peak) on resistance (peak) v i = 0 v to v dd ? v ee ; see figure 10 and figure 11 5 v 350 2500 10 v 80 245 15 v 60 175 r on(rail) on resistance (rail) v i = 0 v; see figure 10 and figure 11 5 v 115 340 10 v 50 160 15 v 40 115 v i = v dd ? v ee ; see figure 10 and figure 11 5 v 120 365 10 v 65 200 15 v 50 155 r on on resistance mismatch between channels v i = 0 v to v dd ? v ee ; see figure 10 5 v 25 - 10 v 10 - 15 v 5 -
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 8 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 10.2.1 on resistance waveform and test circuit r on =v sw /i sw . fig 10. test circuit for measuring r on v 001aaj9 02 v ss v i v sw i sw switch v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 1 2 fig 11. typical r on as a function of input voltage v i (v) 015 510 001aae648 200 300 100 400 r on ( ) 0 v dd = 5 v 10 v 15 v
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 9 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 11. dynamic characteristics 11.1 waveforms and test circuit table 8. dynamic characteristics t amb = 25 c; v ss = v ee = 0 v; for test circuit see figure 15 . symbol parameter conditions v dd typ max unit t phl high to low propagation delay nyn, nz to nz, nyn; see figure 12 5 v 1020ns 10 v 5 10 ns 15 v 5 10 ns sn to nyn, nz; see figure 13 5 v 200 400 ns 10 v 85 170 ns 15 v 65 130 ns t plh low to high propagation delay nyn, nz to nz, nyn; see figure 12 5 v 1530ns 10 v 5 10 ns 15 v 5 10 ns sn to nyn, nz; see figure 13 5 v 275 555 ns 10 v 100 200 ns 15 v 65 130 ns t phz high to off-state propagation delay e to nyn, nz; see figure 14 5 v 200 400 ns 10 v 115 230 ns 15 v 110 220 ns t pzh off-state to high propagation delay e to nyn, nz; see figure 14 5 v 260 525 ns 10 v 95 190 ns 15 v 65 130 ns t plz low to off-state propagation delay e to nyn, nz; see figure 14 5 v 200 400 ns 10 v 120 245 ns 15 v 110 215 ns t pzl off-state to low propagation delay e to nyn, nz; see figure 14 5 v 280 565 ns 10 v 105 205 ns 15 v 70 140 ns measurement points are given in table 9 . measurement points are given in table 9 . fig 12. nyn, nz to nz, nyn propagation delays fig 13. sn to nyn, nz propagation delays 001aac29 0 nyn or nz input nz or nyn output t plh t phl v dd v ee v m v m v o v ee 001aac29 1 switch on t plh t phl switch off v dd v ss v o v ee nyn or nz output sn input switch off 10 % 90 % v m
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 10 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch measurement points are given in table 9 . fig 14. enable and disable times 001aac29 2 t plz t phz switch off switch on switch on nyn or nz output low-to-off off-to-low nyn or nz output high-to-off off-to-high e input v o v o v ee v ee v dd v ss v m t pzl t pzh 90 % 90 % 10 % 10 % table 9. measurement points supply voltage input output v dd v m v m 5 v to 15 v 0.5v dd 0.5v dd
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 11 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch [1] for nyn to nz or nz to nyn propagation delays use v ee . for sn to nyn or nz propagation delays use v dd . test data is given in table 10 . definitions: dut = device under test. r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including test jig and probe. r l = load resistance. fig 15. test circuit for measuring switching times 001aaj90 3 v i v o r t c l r l s1 dut pulse generator t w v m v i v i v dd v dd v ss v ee open 0 v negative pulse v i 0 v positive pulse 10 % 90 % 90 % 10 % v m v m v m t w t f t f t r t r table 10. test data input load s1 position nyn, nz sn and e t r , t f v m c l r l t phl [1] t plh t pzh , t phz t pzl , t plz other v dd or v ee v dd or v ss 20 ns 0.5v dd 50 pf 10 k v dd or v ee v ee v ee v dd v ee
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 12 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 11.2 additional dynamic parameters [1] f i is biased at 0.5 v dd ; v i =0.5v dd (p-p). 11.2.1 test circuits table 11. additional dynamic characteristics v ss = v ee = 0 v; t amb = 25 c. symbol parameter conditions v dd typ max unit thd total harmonic distortion see figure 16 ; r l =10k ; c l =15pf; channel on; v i =0.5v dd (p-p); f i =1khz 5 v [1] 0.25 - % 10 v [1] 0.04 - % 15 v [1] 0.04 - % f ( ? 3db) ? 3 db frequency response see figure 17 ; r l = 1 k ; c l = 5 pf; channel on; v i =0.5v dd (p-p) 5 v [1] 13 - mhz 10 v [1] 40 - mhz 15 v [1] 70 - mhz iso isolation (off-state) see figure 18 ; f i = 1 mhz; r l = 1 k ; c l = 5 pf; channel off; v i =0.5v dd (p-p) 10 v [1] ? 50 - db v ct crosstalk voltage digital inputs to switch; see figure 19 ; r l = 10 k ; c l =15pf; e or sn = v dd (square-wave) 10 v 50 - mv xtalk crosstalk between switches; see figure 20 ; f i = 1 mhz; r l =1 k ; v i =0.5v dd (p-p) 10 v [1] ? 50 - db table 12. dynamic power dissipation p d p d can be calculated from the formulas shown; v ee = v ss =0 v; t r = t f 20 ns; t amb = 25 c. symbol parameter v dd typical formula for p d ( w) where: p d dynamic power dissipation 5v p d = 2500 f i + (f o c l ) v dd 2 f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v dd = supply voltage in v; (c l f o ) = sum of the outputs. 10 v p d = 11500 f i + (f o c l ) v dd 2 15 v p d = 29000 f i + (f o c l ) v dd 2 fig 16. test circuit for measuring total harmonic distortion fig 17. test circuit for measuring frequency response d 001aaj90 4 v ss f i r l c l switch v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 1 2 db 001aaj90 5 v ss f i r l c l switch v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 1 2
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 13 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch fig 18. test circuit for measuring isolation (off-state) db 001aaj90 6 v ss f i r l c l switch v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 1 2 a. test circuit b. input and output pulse definitions fig 19. test circuit for measuring crosstalk voltage between digital inputs and switch 001aaj907 v dd or v ss 0.5v dd switch v ss = v ee s1 to s3 e nz ny0 v dd ny1 1 2 g v r l r l c l v o 001aaj90 8 on v o v ct off off logic input (sn, e)
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 14 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch a. switch closed condition b. switch open condition fig 20. test circuit for measuri ng crosstalk between switches 001aaj90 9 v ss v o r l r l v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 v i 001aaj91 0 v ss v i r l r l v ss = v ee s1 to s3 e nz ny0 v dd or v ss v dd ny1 v o
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 15 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 12. package outline fig 21. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 d ip16: plastic dual in-line package; 16 leads (300 mil) sot38 -4
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 16 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch fig 22. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale s o16: plastic small outline package; 16 leads; body width 3.9 mm sot109 -1
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 17 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch fig 23. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403 -1 a max. 1.1 pin 1 index
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 18 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 13. revision history table 13. revision history document id release date data sheet status change notice supersedes hef4053b_9 20100325 product data sheet - hef4053b_8 hef4053b_8 20100224 product data sheet - hef4053b_7 modifications: ? table 6 ? static characteristics ? : conditions v il and v ih corrected. hef4053b_7 20091127 product data sheet - hef4053b_6 hef4053b_6 20090924 product data sheet - hef4053b_5 hef4053b_5 20090825 product data sheet - hef4053b_4 hef4053b_4 20090713 product data sheet - hef4053b_cnv_3 hef4053b_cnv_3 19950101 product specification - hef4053b_cnv_2 hef4053b_cnv_2 19950101 pr oduct specification - -
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 19 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 14. legal information 14.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 14.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 14.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer?s third party customer(s) (hereinafter both referred to as ?application?). it is customer?s sole responsibility to check whether the nxp semiconductors product is suitable and fit for the application planned. customer has to do all necessary testing for the application in order to avoid a default of the application and the product. nxp semiconducto rs does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 14.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
hef4053b_9 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 09 ? 25 march 2010 20 of 21 nxp semiconductors hef4053b triple single-pole double-throw analog switch 15. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors hef4053b triple single-pole double-throw analog switch ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 25 march 2010 document identifier: hef4053b_9 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 16. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 4 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 recommended operating conditions. . . . . . . . 5 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.2.1 on resistance waveform and test circuit . . . . . 8 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11.1 waveforms and test circuit . . . . . . . . . . . . . . . . 9 11.2 additional dynamic parameters . . . . . . . . . . . 12 11.2.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 14 legal information. . . . . . . . . . . . . . . . . . . . . . . 19 14.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 14.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 14.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 14.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15 contact information. . . . . . . . . . . . . . . . . . . . . 20 16 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

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